Use of a TiN barrier to improve GaAs FET ohmic contact reliability

Ronald Remba; Ilkka Suni; Marc Nicolet

doi:10.1109/EDL.1985.26182

Use of a TiN barrier to improve GaAs FET ohmic contact reliability

Ronald Remba, Ilkka Suni, Marc Nicolet

VTT Technical Research Centre of Finland

Research output: Contribution to journal › Article › Scientific › peer-review

12 Citations (Scopus)

Abstract

We have used a reactively sputtered TiN diffusion barrier to prevent interpenetration of a (Ni)GeAuPt ohmic contact layer and Ti/Pt/Au overlay on GaAs devices baked at 250-300°C in air. Planar GaAs MESFET's and TLM patterns were fabricated and iteratively tested and baked. Devices without TiN showed severe degradation in morphology and dc and RF performance. Devices with TiN remained essentially unchanged.

Original language	English
Pages (from-to)	437-438
Journal	Electron device letters
Volume	6
Issue number	8
DOIs	https://doi.org/10.1109/EDL.1985.26182
Publication status	Published - 1985
MoE publication type	A1 Journal article-refereed

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10.1109/EDL.1985.26182

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title = "Use of a TiN barrier to improve GaAs FET ohmic contact reliability",

abstract = "We have used a reactively sputtered TiN diffusion barrier to prevent interpenetration of a (Ni)GeAuPt ohmic contact layer and Ti/Pt/Au overlay on GaAs devices baked at 250-300°C in air. Planar GaAs MESFET's and TLM patterns were fabricated and iteratively tested and baked. Devices without TiN showed severe degradation in morphology and dc and RF performance. Devices with TiN remained essentially unchanged.",

author = "Ronald Remba and Ilkka Suni and Marc Nicolet",

year = "1985",

doi = "10.1109/EDL.1985.26182",

language = "English",

volume = "6",

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journal = "Electron device letters",

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publisher = "IEEE Institute of Electrical and Electronic Engineers",

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AU - Remba, Ronald

AU - Suni, Ilkka

AU - Nicolet, Marc

PY - 1985

Y1 - 1985

N2 - We have used a reactively sputtered TiN diffusion barrier to prevent interpenetration of a (Ni)GeAuPt ohmic contact layer and Ti/Pt/Au overlay on GaAs devices baked at 250-300°C in air. Planar GaAs MESFET's and TLM patterns were fabricated and iteratively tested and baked. Devices without TiN showed severe degradation in morphology and dc and RF performance. Devices with TiN remained essentially unchanged.

AB - We have used a reactively sputtered TiN diffusion barrier to prevent interpenetration of a (Ni)GeAuPt ohmic contact layer and Ti/Pt/Au overlay on GaAs devices baked at 250-300°C in air. Planar GaAs MESFET's and TLM patterns were fabricated and iteratively tested and baked. Devices without TiN showed severe degradation in morphology and dc and RF performance. Devices with TiN remained essentially unchanged.

U2 - 10.1109/EDL.1985.26182

DO - 10.1109/EDL.1985.26182

M3 - Article

SN - 0193-8576

VL - 6

SP - 437

EP - 438

JO - Electron device letters

JF - Electron device letters

IS - 8

ER -

Use of a TiN barrier to improve GaAs FET ohmic contact reliability

Abstract

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