Using dynamic voltage scaling to reduce the configuration energy of run time reconfigurable devices

Yang Qu, Juha-Pekka Soininen, Jari Nurmi

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

6 Citations (Scopus)

Abstract

In this paper, an approach that uses dynamic voltage scaling (DVS) to reduce the configuration energy of run-time reconfigurable devices is proposed. The basic idea is to use configuration prefetching and parallelism to create excessive system idle time and apply DVS on the configuration process when such idle time can be utilized. A genetic algorithm is developed to solve the task scheduling and voltage assignment problem. With real applications, the results show that up to 19.3% of configuration energy can be reduced. When considering the reduction of the configuration energy, the results show that using more computation resources is more favorable when the configuration latency is relatively small, and using more configuration controllers is more favorable for relatively large latency.
Original languageEnglish
Title of host publicationDesign, Automation and Test in Europe Conference and Exhibition, 2007
PublisherIEEE Institute of Electrical and Electronic Engineers
Pages147-152
ISBN (Print)978-3-9810-8012-4
DOIs
Publication statusPublished - 2007
MoE publication typeA4 Article in a conference publication
EventDesign, Automation & Test in Europe Conference & Exhibition, 2007 - Nice, France
Duration: 16 Apr 200720 Apr 2007

Conference

ConferenceDesign, Automation & Test in Europe Conference & Exhibition, 2007
CountryFrance
CityNice
Period16/04/0720/04/07

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Keywords

  • run-time reconfigurable hardware
  • dynamic voltage scaling
  • genetic algorithm

Cite this

Qu, Y., Soininen, J-P., & Nurmi, J. (2007). Using dynamic voltage scaling to reduce the configuration energy of run time reconfigurable devices. In Design, Automation and Test in Europe Conference and Exhibition, 2007 (pp. 147-152). IEEE Institute of Electrical and Electronic Engineers . https://doi.org/10.1109/DATE.2007.364582