Using dynamic voltage scaling to reduce the configuration energy of run time reconfigurable devices

Yang Qu; Juha-Pekka Soininen; Jari Nurmi

doi:10.1109/DATE.2007.364582

Using dynamic voltage scaling to reduce the configuration energy of run time reconfigurable devices

Yang Qu, Juha-Pekka Soininen, Jari Nurmi

Tampere University of Technology (TUT)

Research output: Chapter in Book/Report/Conference proceeding › Conference article in proceedings › Scientific › peer-review

7 Citations (Scopus)

Abstract

In this paper, an approach that uses dynamic voltage scaling (DVS) to reduce the configuration energy of run-time reconfigurable devices is proposed. The basic idea is to use configuration prefetching and parallelism to create excessive system idle time and apply DVS on the configuration process when such idle time can be utilized. A genetic algorithm is developed to solve the task scheduling and voltage assignment problem. With real applications, the results show that up to 19.3% of configuration energy can be reduced. When considering the reduction of the configuration energy, the results show that using more computation resources is more favorable when the configuration latency is relatively small, and using more configuration controllers is more favorable for relatively large latency.

Original language	English
Title of host publication	Design, Automation and Test in Europe Conference and Exhibition, 2007
Publisher	IEEE Institute of Electrical and Electronic Engineers
Pages	147-152
ISBN (Print)	978-3-9810-8012-4
DOIs	https://doi.org/10.1109/DATE.2007.364582
Publication status	Published - 2007
MoE publication type	A4 Article in a conference publication
Event	Design, Automation & Test in Europe Conference & Exhibition, 2007 - Nice, France Duration: 16 Apr 2007 → 20 Apr 2007

Conference

Conference	Design, Automation & Test in Europe Conference & Exhibition, 2007
Country/Territory	France
City	Nice
Period	16/04/07 → 20/04/07

Keywords

run-time reconfigurable hardware
dynamic voltage scaling
genetic algorithm

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10.1109/DATE.2007.364582

Cite this

@inproceedings{8c2021aae7b44cbb920eb6b911979854,

title = "Using dynamic voltage scaling to reduce the configuration energy of run time reconfigurable devices",

abstract = "In this paper, an approach that uses dynamic voltage scaling (DVS) to reduce the configuration energy of run-time reconfigurable devices is proposed. The basic idea is to use configuration prefetching and parallelism to create excessive system idle time and apply DVS on the configuration process when such idle time can be utilized. A genetic algorithm is developed to solve the task scheduling and voltage assignment problem. With real applications, the results show that up to 19.3% of configuration energy can be reduced. When considering the reduction of the configuration energy, the results show that using more computation resources is more favorable when the configuration latency is relatively small, and using more configuration controllers is more favorable for relatively large latency.",

keywords = "run-time reconfigurable hardware, dynamic voltage scaling, genetic algorithm",

author = "Yang Qu and Juha-Pekka Soininen and Jari Nurmi",

year = "2007",

doi = "10.1109/DATE.2007.364582",

language = "English",

isbn = "978-3-9810-8012-4",

pages = "147--152",

booktitle = "Design, Automation and Test in Europe Conference and Exhibition, 2007",

publisher = "IEEE Institute of Electrical and Electronic Engineers",

address = "United States",

note = "Design, Automation & Test in Europe Conference & Exhibition, 2007 ; Conference date: 16-04-2007 Through 20-04-2007",

}

Qu, Y, Soininen, J-P & Nurmi, J 2007, Using dynamic voltage scaling to reduce the configuration energy of run time reconfigurable devices. in Design, Automation and Test in Europe Conference and Exhibition, 2007. IEEE Institute of Electrical and Electronic Engineers, pp. 147-152, Design, Automation & Test in Europe Conference & Exhibition, 2007, Nice, France, 16/04/07. https://doi.org/10.1109/DATE.2007.364582

Using dynamic voltage scaling to reduce the configuration energy of run time reconfigurable devices. / Qu, Yang; Soininen, Juha-Pekka; Nurmi, Jari.
Design, Automation and Test in Europe Conference and Exhibition, 2007. IEEE Institute of Electrical and Electronic Engineers, 2007. p. 147-152.

Research output: Chapter in Book/Report/Conference proceeding › Conference article in proceedings › Scientific › peer-review

TY - GEN

T1 - Using dynamic voltage scaling to reduce the configuration energy of run time reconfigurable devices

AU - Qu, Yang

AU - Soininen, Juha-Pekka

AU - Nurmi, Jari

PY - 2007

Y1 - 2007

N2 - In this paper, an approach that uses dynamic voltage scaling (DVS) to reduce the configuration energy of run-time reconfigurable devices is proposed. The basic idea is to use configuration prefetching and parallelism to create excessive system idle time and apply DVS on the configuration process when such idle time can be utilized. A genetic algorithm is developed to solve the task scheduling and voltage assignment problem. With real applications, the results show that up to 19.3% of configuration energy can be reduced. When considering the reduction of the configuration energy, the results show that using more computation resources is more favorable when the configuration latency is relatively small, and using more configuration controllers is more favorable for relatively large latency.

AB - In this paper, an approach that uses dynamic voltage scaling (DVS) to reduce the configuration energy of run-time reconfigurable devices is proposed. The basic idea is to use configuration prefetching and parallelism to create excessive system idle time and apply DVS on the configuration process when such idle time can be utilized. A genetic algorithm is developed to solve the task scheduling and voltage assignment problem. With real applications, the results show that up to 19.3% of configuration energy can be reduced. When considering the reduction of the configuration energy, the results show that using more computation resources is more favorable when the configuration latency is relatively small, and using more configuration controllers is more favorable for relatively large latency.

KW - run-time reconfigurable hardware

KW - dynamic voltage scaling

KW - genetic algorithm

U2 - 10.1109/DATE.2007.364582

DO - 10.1109/DATE.2007.364582

M3 - Conference article in proceedings

SN - 978-3-9810-8012-4

SP - 147

EP - 152

BT - Design, Automation and Test in Europe Conference and Exhibition, 2007

PB - IEEE Institute of Electrical and Electronic Engineers

T2 - Design, Automation & Test in Europe Conference & Exhibition, 2007

Y2 - 16 April 2007 through 20 April 2007

ER -

Using dynamic voltage scaling to reduce the configuration energy of run time reconfigurable devices

Abstract

Conference

Keywords

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