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Verification of FPGA application design by model checking

  • Antti Pakonen

    Research output: Contribution to conferenceOther conference contributionScientific

    Original languageEnglish
    Publication statusPublished - 2016
    MoE publication typeNot Eligible
    Event9th International Workshop on the Application of Field Programmable Gate Arrays in Nuclear Power Plants - Lyon, France
    Duration: 3 Oct 20166 Oct 2016

    Workshop

    Workshop9th International Workshop on the Application of Field Programmable Gate Arrays in Nuclear Power Plants
    Country/TerritoryFrance
    CityLyon
    Period3/10/166/10/16

    Keywords

    • model checking
    • FPGA
    • PLD
    • formal verification
    • nuclear power
    • SAUNA: Integrated safety assessment and justification of nuclear power plant automation

      Pakonen, A. (Manager), Tommila, T. (Participant), Alanen, J. (Participant), Björkman, K. (Participant), Laarni, J. (Participant), Lahtinen, J. (Participant), Oedewald, P. (Participant), Papakonstantinou, N. (Participant), Reiman, T. (Participant), Tyrväinen, T. (Participant), Valkonen, J. (Participant), Koskinen, H. (Participant), Porthin, M. (Participant), Savioja, P. (Participant), Linnosmaa, J. (Participant), Vyatkin, V. (Participant), Pang, C. (Participant), Buzhinsky, I. (Participant), Varkoi, T. (Participant), Nevalainen, R. (Participant), Holmberg, J.-E. (Participant), Uusitalo, E. (Participant) & Koskela, M. (Participant)

      1/02/1531/01/19

      Project: Research

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